Week 6 Report
July 5 - July 9 2010
This week I
dedicated my time to debugging my code. The Xilinx ISE 12.1 software
gave me several warnings which I have to review and decide
whether the warning can be ignore or I would need to correct
the error in my code. It is very important to examine each
warning to avoid possible hardware malfunction. In the process
of developing the code sometimes, it is necessary to code in a
way that might cause the compiler to generate a warning.
Nevertheless, even though some warnings clear others may be
the result of typos and/or errors on the code which can cause
the FPGA device to malfunction. At the beginning of the week I had a total of 200 or more warnings that I needed to look at and judge whether it was coded as part of the design or an error. By the end of this week I have reduced the number down around 60 warnings.
You can
reach me at fernandez.andres@sbcglobal.net
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