CoGenT is the overall project that I will be a part of. Officially, CoGenT is an integrated simulator/compiler environment driven by higher level specifications. It includes machine description languages to describe parts of machine architectures (specifically, instruction set architecture and micro-architecture) and generators that take these descriptions as input and generate components that can plug in to existing compiler and simulator frameworks.
One major component of the project is a tool called Gist. Gist attempts to generate instruction selection patterns from a compiler's internal representation (IR) to a target machine architecture (say, x86). For example, given a compiler's IR instructions such as the JVM's iadd bytecode, Gist will find a sequence of x86 instructions that will replicate iadd exactly. By doing this, the goal is to automate the process of building an instruction selector, which is a major component of compiler's backend.
The role I will play in all of this is taking the instruction selection patterns (i.e., the mappings from IR to target machine) and integrating them into existing compiler frameworks. Along, the way, I should learn a lot about other architectures (PPC, x86, MIPS, ARM, etc.) and existing compiler frameworks (JikesRVM's baseline compiler, lcc, gcc).
The final paper detailing my research findings is available.