On Monday, I finished reading the VPR papers and manuals and ran VPR - now with a better understanding of what it was doing - on a small sample circuit that came with VPR.
On Tuesday, I experimented with some different VPR options. In addition to a netlist file, you have to give VPR a second input file describing what your FPGA looks like. My mentor wanted me to experiment with FPGA description files calling for some routing channels to be wider than (have more tracks than) the other channels. From what I saw, the features VPR currently has are insufficient for what my professor wants and some modifications to VPR will be necessary.
Wednesday through Friday, I continued to experiment with VPR and explore how its code is organized to try to determine the best way to implement the modifications I mentioned above.